1. Detailed Description of the Invention
The present invention relates to a pulse generation apparatus for generating a pulse signal having pulse width controlled, and an image recording apparatus for recording an image on an image recording medium by adopting the pulse generation apparatus.
2. Description of the Related Art
In order to record a high-quality gray-scale image, it is necessary to accurately form dots having a predetermined exposure at a predetermined position. Further, by handling a plurality of dots as one half tone cell, it is possible to record a beautiful image without unevenness by increasing a number of gradation levels.
In an image recording apparatus using a light source comprising a multiplicity of light-emitting points arranged across the recording area, there is adopted a method of recording an image by appropriately repeating pulse light emitting in response to the image, and therefore, control factors for the exposure are the following three:
1. a pulse number PA1 2. pulse width PA1 3. pulse light-emitting intensity
and such a conventional image recording apparatus has performed gradation depiction and exposure stabilization by using these three control factors.
When, for example, the pulse number is adopted as a control factor, a number of times for an optical pulse irradiated per predetermined area will be increased or decreased. The predetermined area here often means, when a square having the width of a scanning line as the length of one side is defined as one dot, the area of this one dot normally. For example, in a system designed so that the optical pulse can be generated four times while the beam irradiation position moves by an amount corresponding to one dot, the exposure can be adjusted in four stages.
Also, when the pulse width is adopted as a control factor, the width of the optical pulse will be increased or decreased, and actually the width of the driving pulse for the electric circuit is to be adjusted. For example, in a system designed so that the width of the optical pulse can be increased or decreased in four stages, the exposure can be adjusted in four stages.
Also, when the pulse light-emitting intensity is adopted as a control factor, the intensity of the optical pulse will be increased or decreased to adjust the current amplitude or voltage amplitude of a driving pulse in the circuit. In a system designed so that the intensity of the optical pulse can be increased or decreased in four stages, the exposure can be adjusted in four stages.
As an example of an image recording apparatus having a light source comprising a multiplicity of light-emitting points arranged across the recording area, a printer (hereinafter called "LED printer") using a LED print head will be taken up for explanation. The apparatus which is popularly used currently is the one having resolution of 600 spi (Scan Per Inch), and when the process rate is set to 120 mm/sec, and the main scanning width is set to 300 mm (number of light-emitting elements is about 7,000 pieces), each control factor often adjusts so that the pulse number has about two stages, the pulse width has about 16 stages, and the pulse light-emitting intensity has about 16 stages because of constraints of the driving LSI. Each control factor has few control steps like this. This is because a multiplicity of light-emitting points are caused to pulse-emit light at the same time, the shift register for transferring modulation data, the latch unit, the current or voltage control circuit for controlling the exposure and the pulse width control circuit are required in the same number as at least a number of the light-emitting elements which are caused to light once, and are subject to constraints in respects of the circuit area, that is, the chip area of the driving LSI and power consumption.
Next, citing an example in which gradation depiction is performed while the exposure is being stabilized using these control factors, when gradation using pulse number control is set to two steps, gradation using pulse width control is set to 16 steps and the size of a half-tone cell is set to four dots (2 dots each long and wide), the number of gradation steps which can be expressed becomes 2.times.16.times.4=128, and the stabilized exposure is to be performed by the remaining control factors (16 stages of pulse light-emitting intensity). Normally, variations in the light-emitting amount occur about .+-.20% with the LED print head, and therefore, one stage for adjusting the pulse light-emitting intensity is 2.5% even if an adjusting range, in which there exist 16 stages of pulse light-emitting intensity, is skillfully set, and only rough adjustment can be performed.
In order to improve such deficiency of the number of gradation depiction and the exposure stabilization precision, it is necessary to finely adjust those three control factors.
(1) In the pulse number, it takes time to transfer modulation data, and the transfer circuit for the modulation data must be made faster. To the end, the driving LSI must be made faster, the LSI fabrication process must be replaced with a process corresponding to the higher rate, and a significant increase in cost is demanded.
(2) In the pulse light-emitting intensity, it is necessary to increase the resolution of the D/A converter for controlling the driving current or driving voltage, and it is necessary to further make the analog circuit larger, which accounts for the greater part of the area and the power consumption of the driving LSI.
(3) In the pulse width, the counter circuit for controlling the pulse width must be made faster. To the end, it is necessary to replace the fabrication process for the driving LSI with a process corresponding to the higher rate, and a significant increase in cost is demanded. Also, as regards a method of finely controlling the pulse width without the aid of any high-speed clock, by combining a delay element having a finer amount of delay than the clock period with the counter circuit for use, there have been proposed several ones, but all of them have problems, and cannot be used.
Under the above-described circumstances, it is not easy to further divide the control step.
As regards a conventional method (above-described (3)) for finely controlling the pulse width by the delay element without the aid of any high-speed clock which has been proposed, the problems will be described in detail.
Such a high resolution pulse width control method has been proposed in detail in, for example, Japanese Published Unexamined Patent Application Nos. 1-138809, 4-223667, 5-091274, 5-096780 and 8-146328.
These can be roughly divided into two, and the first of them (for the Japanese Published Unexamined Patent Application Nos. 1-138809, 4-223667, 5-091274, and 8-146328, see the official gazettes) is constructed such that a clock of a comparatively low frequency is counted by a counter to generate a pulse, this pulse is delayed by a desired time period by a delay-time variable type delay unit, and thereafter the original pulse and logical OR or logical product are taken. The pulse width control resolution of this method is determined by the delay time control step of the delay unit.
Considering, for example, a case where a 20 MHz clock is counted by a number indicated by high-order four bits of a pulse width control signal to generate a pulse, and this pulse is delayed by a time period indicated by the low-order four bits to take logical OR of the both finally, the delay unit is constructed so that its control step becomes about 3.1 ns. Thus, the same pulse width control can be performed as a pulse created by counting a 320 MHz (period=about 3.1 ns) clock.
In order to ensure the linearity during carrying (for example, 5 F and 60 in hexadecimal) of the pulse width control signal, it is necessary to set the control step of the delay time accurately to 3.1 ns in the delay unit used here. For example, when the control step changes from 3.1 ns to 3.2 ns, each step such as 50 to 5 F and 60 to 6 F is fixed at 3.2 ns, but 2.0 ns is reached between 5 F and 60, between 6 F and 70, and the like, and the linearity is lost. In order to complement this defect, an expensive high-precision element is normally used for the delay unit in this method. Even in the case of converting this control circuit into an LSI, no high-precision delay element can be fabricated within the LSI, and therefore, it is necessary to externally add an expensive high-precision element for use.
Considering the application of this method to an image recording apparatus having a light source comprising a multiplicity of light-emitting points arranged across the recording area, it becomes necessary to provide high-precision delay elements at least in the same number as the number of light-emitting elements which are lighted at the same time. Moreover, those high-precision delay elements must be externally provided for the driving LSI, and it is actually impossible to construct the driving circuit by this method. Next, the description will be made of the second high resolution pulse width control method (see Japanese Published Unexamined Patent Application No. 5-096780). Polyphase clocks, which are delayed a fixed time period at a time, are created from clocks with a comparatively low frequency by the delay unit, and one clock with an optimum phase is selected from these polyphase clocks for counting. The generation of a pulse signal is started at predetermined timing, and the generation of the pulse signal is stopped according to an instruction from this counter, whereby the pulse width can be finely controlled in response to the phase of the clock.
Even in this method, the pulse width control resolution is determined by phase differences of the polyphase clocks. In the case of such structure that after 16-phase polyphase clocks are created from, for example, 20 MHz clocks, clocks having a phase indicated by the low order four bits of the pulse width control signal are selected, and the generation of the pulse signal is stopped at timing at which this clock is counted in a number indicated by the high order four bits, the same pulse width control as a pulse created by counting a 320 MHz clock can be performed in principle if the phase difference of polyphase clocks is about 3.1 ns.
Actually, however, a case where timing, at which the counter starts counting, is close to the phase of a clock selected frequently occurs, and at this time, there is a critical defect that a malfunction in which the counter counts or does not count the first clock is caused.
This method is the same as the first method in that in order to ensure the linearity of the pulse width control, it is necessary to use an expensive high-precision delay element.
As described above, the conventional method for finely controlling the pulse width by the delay element without the aid of any high-speed clock which has been proposed, cannot be adopted for the LSI for simultaneously driving a multiplicity of elements.